9th International Conference on Advanced Thermal Processing of Semiconductors
RTP 2001
September 25 - 29, 2001
HILTON Anchorage
Alaska
PLENARY SESSION
The Future of RTP, a Technology that can change The IC FAB
Industry
B. Mattson, Mattson Technology, Fremont, CA
Driving 100nm and below 300 mm manufacturing solutions - An era of single wafer
processing, fab efficiencies, and new materials and technology introductions at
reduced thermal budget and improved cycle time
C. Gronet, P. Meissner, K. Truman, G. Miner, R.P.S Thakur,
Applied Materials, Santa Clara, CA
The Effects of Thermal Processing on CMOS Device Performance
C.F. Machala, S.H. Yang, texas Instruments, Dallas, TX
Physics and Chemical Constrains on the Application of Rapid Thermal Processing to the Deposition and Post-Deposition Processing of Alternative High-k Gate Dielectrics
G. Lucovsky, NC State Univeristy, Raleigh, NC
Dependence of Gate oxide Dielectric Breakdown on S/D RTA
A. Kamgar, H.M. Vaidya, and F.H. Baumann, Agere Systems, Murray Hill, NJ
Pattern Shift Reduction in Dual Side Heated RTP Systems with Hot Shielding Technology
R. Berger, S. Miethaner, H. Gruber, Infineon Technologies, Regensburg, Germany
W. Dietl, Z. Nenyei, Mattson Thermal Products, Dornstadt, Germany
Low Temperature in RTP
T. Gutt, Infenion, Munchen, Germany
Electromagnetic Induction Heating for Cold Wall Rapid Thermal Processing
K. Thompson, J.H. Booske, Y.B. Gianchandani, R. Cooper, University of Wisconsin, Madison, WI
Spike Annealing of Silicon Using Millimeter-wave Power
Y. Bykov, A. Eremeev, V. Holoptsev, I. Plotnikov, N. Zharova
Institute of Applied Physics, Nizhny Novgorod, Russia
Excimer - laser activation of dopants in silicon: a high energy excimer laser source for a single shot and uniform treatment over a whole die area
C. Prat, D. Zahorski, M. Stehle, SOPRA, Bois Colombes, France,
J. Boulmer, D. Debarre, G. Kerrien, Universite Paris, France
State of the Art Vertical Furnace
A. Hasper, T.Claasen-Vujcic, ASM International, Bilthoven, The Netherlands
Evidence for Non-thermal Illumination - Enhanced Diffusion in Implanted Silicon
M.Y. L. Yung, E.G. Seebauer, University of Illinois, Urbana, IL
Athermal Annealing of Silicon Implanted Layers
B. Lojek, M. Whiteman, Atmel, Colorado Springs, CO, R. Ahrenkiel, NREL Golden, CO
Athermal Annealing of Ion-Implanted Silicon
D.W. Donnelly, B.C. Covington, Southwest State Univeristy, San Marcos, TX
J. Grun, R.P. Fischer, M. Peckerar, C.L. Felix, J.R. Meyer, R. Mignogna, A. Ting, Naval Research Laboratory, Washington,
DC, B. Boro Djordevic, John Hopkins University, Baltimore, MD,
C.K. Manka, Research Support Instruments, Lanham, MD
Ramp-Rate Effects in Transient Enhanced Diffusion: a Quasi-Analytical Examination
M.Y. L. Yung, E.G. Seebauer, University of Illinois, Urbana, IL
Comparative Study on Implant Anneal using Single Wafer Furnace and Lamp-based Rapid Thermal Processor
Woo Sik Yoo, T. Fukada, WaferMasters, San Jose, CA,
T. Setokubo, K. Aizawa, NEC, Hiroshima, Japan,
T. Ohsawa, N. Takahashi, R. Komatubara, Tokyo Electron, Japan
Characterization of Hot Wall RTP for Thin Gate Oxide Films
C. Ratliff, M. Schaefer, Y. Senazaki, J. Sisson, R. Herring,
ASML Thermal Division, Scotts Valley, CA
High Performance Ultra-thin Silicon Nitride Stack Gate Dielectrics Prepared by in-situ RTCVD Techniques
J.S. Jeon, Q. Xiang, H.S. Kim, B. Ogle, AMD Sunnyvale, CA, H. Tseng, Motorola, Austin, TX
Steam Oxidation in Applied Materials' RTP Systems
H.J.L. Forstner, A. Luscri, N. Ingle, M. Williams, Z. Yuan, Applied Materials, Santa Clara, CA
Wet Oxidation using Single Wafer Furnace
T. Fukada, Woo Sik Yoo, WaferMasters, San Jose, CA, Y. Hiraga, K. Kang, R. Komatsubara, Tokyo Electron, Japan
Single-Wafer Furnace RTP CVD for Silicon Oxide, Nitride, and Oxynitride Thin Films
Y. Senazaki, C. Barelli, D. Teasdale, J. Sisson, R. Herring,
ASML Thermal Division, Scotts Valley, CA
Ultra Thin Oxide Characterization with MBE Deposited Poly Silicon
J. Schulze, A. Stadler, C. Tolksdorf, S. Sedlmaier, I. Eisele, University of Bundeswehr, Munchen, Germany, W. Dietl, G.L. Roters, Z. Nenyei, Mattson Thermal Products, Dornstadt, Germany
A. Huber, Wacker Siltronic, Burghausen, Germany
Growth of Ultrathin Silicon Dioxide Films during Rapid Thermal Oxidation
T. Zeng, H. Doumanidis, J. Hebb, D. Brown, Axcellis Technologies, Beverly, MA
Advantages of the Hot-Shielding Technology on Ultra Thin RTO Quality
A. Stadler, J. Schulze, H. Baumgartner, I. Eisele, University of Bundeswehr, Munchen, Germany,
W. Dietl, G.L. Roters, Z. Nenyei, Mattson Thermal Products, Dornstadt, Germany
Exploring ISSG Process Space
N. Sullivan, L. Raja, R. Kee, Colorado School of Mines, Golden, CO, Y. Yakota, M. Williams, Applied Materials, Santa Clara, CA
Annealing of Ultra-shallow Implanted Junctions using Arc-Lamp Technology:
Achieving the 90 nm Node
R. S. Tichy, SEMATECH Austin, TX, K. Elliot, S. McCoy, D. Singh, VORTEK, Vencouver, BC
Spike Anneal Qualification for USJ Technolgy of 0.13 µm Device on Radiance Centura RTA
H.L. Sun, H.M. Jao, TSMC Tainan, Taiwan
S. Chen, S. Ramamurthy, E. Chiao, D. Wilusz, A. Chen, F. Li, Applied Materials, Taiwan
Device and Material Issues Related to Integration of Junctions with Contacts in Deep 0.1µm MOSEFETs
W. Zagozdzon-Wosik, L. Shao, M. Menon, E. Arroyo-Castelazo, X. Wang, P. van der Heide, J. Liu, W. K. Chu, University of Houston
J. Bennet, Sematech
Fast Ambient Switching for the Multiple-Step Rapid Thermal Processing of Wafers using
a Furnace-Based RTP System
Y. Liu, J. Hebb, Axcelis technology, Beverly, MA
Comparison of Effects from Wafer Backside Films on Temperature Uniformity in Dual Side Lamp Heated Production RTP Systems
J. Bentrup, Atmel, Colorado Springs, CO, G. Wein, Mattson Thermal Products, San Jose, CA
Effects of Wafer Emissivity on Light Pipe Radiometry in RTP Tools
K.G. Kreider, D.P. DeWitt, C.W. Meyer, B.K. Tsai
NIST Gaithersburg, MD
The UT/NIST/SA/ISMT Thermometry Test Bed
F. Geyling, B. Van Eck, D. Sing, International SEMATECH, Austin, TX
K. Ball, G. Papazoglou, B. Noska, K. Huston, The University of Texas,
Austin, TX
A Novel in-situ Light Pipe Pyrometer Calibration Technique
A. Hunter, B. Adams, A. Rubinchik, G. Pham, Applied Materials, Santa Clara, CA
Modeling of Thermocouple Based Wafer Temperature Measurement in a Radiantly-Heated Chamber
F. Yin, V. Gorodetsky, F. Kleyner, C. Garmer, J. Burke, Axcelis Technologies, Rockville, MD
Effects of Radiative Property of Surfaces on Radiometric Temperature Measurement
Y.H. Zhou and Z.M. Zhang, University of Florida, Gainesville, FL
D.P. DeWitt and B.K. Tsai, NIST,Gaithersburg, MD
Optimal Design of a Rapid Thermal Processor via Physical Modeling and Convex Optimization
S.J. Kim, S.Y. Hyun, Y.M. Cho, Seoul National University, Seoul, Korea
Optimal Heating Control Condition to Unify Temperature Distribution in a Wafer during Rapid Thermal Processing with Lamp Heaters
S. Hirasawa, T. Suzuki, S. Maruyama, Hitachi, Ibaraki, Japan
Effect of Growth and Annealing Conditions on Interface Trapped Charge of Dry and Wet Oxides Grown Using Rapid Thermal Oxidation
R. Sharangpani, Sing-Pin Tay, Mattson Thermal products, San Jose, CA
Yield Enhancement of 128M SDRAM by RTA/RTO Process Combination to Suppress the Sidewall Defects of Polycide Gate Conductor
H. K. Hsu, B. Sung, W.H. Chiang, D. Chih, C. Yi, PrMos Technologies, Hsinchu, Taiwan
Characterization and Minimization of Moisture Concentration in Atmospheric Pressure RTP tools using in situ Absorption Spectroscopy Sensor
T. Graf, K. Meyer, Z. Nenyei, W. Lerch, Mattson Thermal Products, Dornstadt, Germany
R. Inman, J. McAndrew, American Air Liquide, Countryside, IL
Activation mechanism for Si-Implanted Layer on GaAs Substrate according to P co-implantation method
T. Taniguchi, Japan Radio Company, Japan
Reduced Time High Temperature processing for Thyristor Silicon Wafers
V. V.N. Obreja, Institut of Microtechnology, Bucharest, Romania
CVD SiC for RTP Chamber Components
J. S. Goela, N.E. Brese, L.E. Burns, M.A. Pickering, Rohm and Haas Advanced Materials, Woburn